RF Subsystem

The RF subsystem of UC6580 adopts dual-frequency dual-channel architecture. The frequency of the input signal ranges from 1166 MHz to 1620 MHz. The received GNSS signals are amplified by a single-ended Low Noise Amplifier (LNA), and then fed to a RF gain block to be further amplified, thus reducing the noise figure requirements for the mixer. The RF gain block also provides a single-ended to differential conversion. After completing the orthogonal down-conversion, multi-GNSS signals are divided into two channels. Afterwards, the I and Q signals of both channels are low-pass filtered and amplified by a separate Programmable Gain Amplifier (PGA), after which both I and Q signals are sent to the high-speed ADC section for data conversion.

The RF subsystem of UC6580 supports any mode below:

• Dual-frequency L1+L5
• Dual-frequency L1+L2
• L1 single-frequency multi-constellation mode.

LNA

The low noise amplifier (LNA) makes use of a single stage configuration and requires external matching to function satisfactorily. For improved performance, an external LNA should be added, of which the gain range is recommended to be within 17dB to 50dB. In an environment with complex interference, it is necessary to use an external SAW filter to suppress out-of-band interference.

Gain Block

A single stage differential amplifier follows the LNA providing further amplification and conversion from single-ended signals to differential signals.

Mixer

UC6580 uses the active I/Q mixer to first convert the multi-GNSS signals to an intermediate frequency signals. At this stage, the signals are split into two IF channels after down-conversion.

IF Filter

UC6580 integrates an I/Q low-pass filter to remove the out-of-band noise after RF down-conversion, which improves the noise performance of the RF system.

AGC

UC6580 supports Automatic Gain Control (AGC), which reduces the convergence time and computing cost. AGC controls the gain configuration of each module in the radio frequency data link according to the signal energy required by the RF system.

PGA and ADC

UC6580 integrates Programmable Gain Amplifier (PGA) and high-speed Analog Digital Convertor (ADC). The gain value of PGA is configured by AGC to ensure that the signal energy output by ADC remains unchanged when the RF input signal energy changes within a certain range, thereby ensuring that the output of the high-speed ADC does not saturate. The high-speed ADC supports the output of I/Q complex sampling signals.